Applied Voltage on an Ideal MOS Capacitor
Applied Voltage on an Ideal MOS Capacitor
This Demonstration simulates the effect of an external bias on an MOS capacitor. The four plots show the electric field (), the corresponding potential of the capacitor (), the carrier density of the semiconductor from the junction through the depletion layer (), and the band profiles of the semiconductor and the metal, all as functions of the position () inside the capacitor. You can vary the gate voltage bias to explore all three regimes of biasing: hole accumulation, depletion, and inversion.
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