WOLFRAM|DEMONSTRATIONS PROJECT

Applied Voltage on an Ideal MOS Capacitor

​
gate voltage
0.
This Demonstration simulates the effect of an external bias on an MOS capacitor. The four plots show the electric field (
F
), the corresponding potential of the capacitor (
V
), the carrier density of the semiconductor from the junction through the depletion layer (
W
), and the band profiles of the semiconductor and the metal, all as functions of the position (
z
) inside the capacitor. You can vary the gate voltage bias to explore all three regimes of biasing: hole accumulation, depletion, and inversion.