2021 Solution 05

Isaac P Abraham
2021 Feb 09

From “Introduction to Computing Systems from bits and gates to C/C++ & beyond” by Yale N. Patt and Sanjay J. Patel. Thoughts?

Reply by email to isaac.abraham@intel.com with subject “Analog Beat 2021 Problem 05” and your answer in the body.

The truth table in Figure 3.7 (b) row 1 is incorrect. The authors are saying that when two MOS devices are stacked the voltage across the devices will be the sum of their individual threshold voltage (VTH). Row 1 specified in terms of the input voltage (V) should read,A B | C0 0 | 0.5