https://x.com/shapoco/status/1984484578296545646
In[]:=
Integrate[Cos[ax]/(1+x^2),{x,0,Infinity},Assumptions->a>0]
Out[]=
-a

π
2
iinv[a_,b_]:=(1/a+1/b)^(-1);
In[]:=
iinv[a_,b_]:=(1/a+1/b)^(-1);​​HoldForm[1+1+iinv[1,1]+iinv[1,1+iinv[1,1+1+1+iinv[1,1]]]]
Out[]=
1+1+iinv[1,1]+iinv[1,1+iinv[1,1+1+1+iinv[1,1]]]
In[]:=
iinv[a_,b_]:=(1/a+1/b)^(-1);1+1+iinv[1,1]+iinv[1,1+iinv[1,1+1+1+iinv[1,1]]]
Out[]=
157
50
In[]:=
3+1/7//N
Out[]=
3.14286
iinv[iinv[]]
In[]:=
3+iinv[iinv[iinv[1,1],iinv[1,1]],iinv[iinv[1,1],1]]
Out[]=
22
7
com
In[]:=
ClearAll[iinv]
In[]:=
SetAttributes[iinv,{Flat,Orderless}]
In[]:=
ClearAll[ee];ee[1]={1};​​ee[n_]:=ee[n]=Union[Flatten@Table[With[{A=ee[i],B=ee[n-i]},Join[Flatten[Outer[Plus,A,B],1],Flatten[Outer[iinv,A,B],1]]],{i,1,Floor[n/2]}],SameTest->Equal]
In[]:=
Table[Length[ee[i]],{i,1,12}]
Out[]=
{1,2,4,10,24,66,180,522,1532,4624,14136,43930}
In[]:=
ee[4]
Out[]=
{4,2iinv[1,1],2+iinv[1,1],1+iinv[1,2],iinv[1,3],iinv[1,1+iinv[1,1]],iinv[2,2],1+iinv[1,1,1],iinv[1,1,2],iinv[1,1,1,1]}
In[]:=
ee[4]//.iinv[x__]:>(Total[1/List[x]])^(-1)
Out[]=
4,1,
5
2
,
5
3
,
3
4
,
3
5
,1,
4
3
,
2
5
,
1
4

iinv[1,1]/.(iinv[x__]:>(Total[1/List[x]])^(-1))
FullForm
:Options expected (instead of 1​) beyond position 1 in FullForm[1,1]. An option must be a rule or a list of rules.
FullForm[1,1]
Out[]=
1
2
In[]:=
ee[4]
{1+iinv[1,iinv[1,1]],iinv[1,1+iinv[1,1]],iinv[1,iinv[1,2]],iinv[1,iinv[1,iinv[1,1]]],iinv[2,2],iinv[2,iinv[1,1]],iinv[iinv[1,1],2],iinv[iinv[1,1],iinv[1,1]]}
In[]:=
MinimalBy[ee[13],Abs[#-Pi]&]
Out[]=

22
7

In[]:=
iinv[iinv[1,1],1]
Out[]=
1
3
In[]:=
22/7//N
Out[]=
3.14286
In[]:=
Table[​​MinimalBy[ee[i],Abs[#-Pi]&],{i,3,10,1}]
Out[]=
{3},{4},
7
2
,
10
3
,
19
6
,
16
5
,
22
7
,
22
7

​
In[]:=
​​delta=0.1;​​wirepad=0.15;​​vpad=0.1;​​rheight=0.1;​​rwidth=0.25;​​(*gfx[g,b]*)​​resistorPlot[n_Integer]:=<|"g"->{Black,Line[{{0,0},{2wirepad+(n-1)delta+(n)rwidth,0}}],EdgeForm[Black],White,​​Table[Rectangle[{wirepad+delta(i-1)+rwidth(i-1),-rheight/2},{wirepad+delta(i-1)+rwidthi,rheight/2}],{i,1,n}]},​​"width"->2wirepad+(n-1)delta+(n)rwidth,​​"height"->rheight,​​"boundingbox"->{{0,-rheight/2},{2wirepad+(n-1)delta+(n)rwidth,rheight/2}}|>;​​Graphics[resistorPlot[4]["g"]]
Out[]=
In[]:=
ClearAll[circuitPlot];​​circuitPlot[circuit_Integer]:=resistorPlot[circuit];​​circuitPlot[circuit_iinv]:=Module[{elems,widths,heights,maxwidth,totalheight},​​elems=circuitPlot/@(List@@circuit);​​{widths,heights}=Transpose[Table[​​{e["width"],​​e["height"]},{e,elems}]];​​maxwidth=Max[widths];​​totalheight=Total[heights]-heights[[1]]/2-Last[heights]/2+vpad(Length[elems]-1);​​<|​​"g"->​​{Black,Line[{{0,0},{wirepad,0}}],​​Line[{{wirepad,-totalheight/2},{wirepad,totalheight/2}}],​​Line[{{wirepad+maxwidth,-totalheight/2},{wirepad+maxwidth,totalheight/2}}],​​Line[{{wirepad+maxwidth,0},{2wirepad+maxwidth,0}}],​​Table[​​With[{hh=totalheight/2-Total[heights[[1;;i-1]]]-vpad(i-1)},​​{If[widths[[i]]<maxwidth,​​{Black,​​Line[{{wirepad,hh},{wirepad+(maxwidth-elems[[i]]["width"])/2,hh}}],​​Line[{{wirepad+maxwidth,hh},{wirepad+maxwidth-(maxwidth-elems[[i]]["width"])/2,hh}}]},{}],​​Translate[elems[[i]]["g"],{wirepad+(maxwidth-elems[[i]]["width"])/2,​​hh}]}],​​{i,1,Length[elems]}​​]​​},​​"width"->(maxwidth+2wirepad),​​"height"->Total[heights]+vpad(Length[elems]-1)|>​​]​​circuitPlot[circuit_Plus]:=Module[{elems,widths,heights,totalwidth,maxheight},​​elems=circuitPlot/@(List@@circuit);​​{widths,heights}=Transpose[Table[​​{e["width"],​​e["height"]},{e,elems}]];​​totalwidth=Max[widths]+(1+Length[elems])wirepad;​​maxheight=Max[heights];​​<|​​"g"->​​{Table[​​With[{xstart=wirepadi+Total[widths[[1;;i-1]]],​​xend=wirepadi+Total[widths[[1;;i]]]},​​{Black,Line[{{xstart,0},{xstart-wirepad,0}}],​​Translate[elems[[i]]["g"],{xstart,0}]}]​​,​​{i,1,Length[elems]}],Black,Line[{{totalwidth,0},{totalwidth-wirepad,0}}]},​​"width"->(totalwidth),​​"height"->maxheight|>​​]​​circuitPlot[5]​​Graphics[circuitPlot[iinv[1,2,3,4]]["g"]]​​Graphics[circuitPlot[iinv[1,1]+iinv[1,1,1,1]]["g"]]